show distribution of interrupt handlers on an SMP system
/etc/displayintr [ -c CPU ]
[ -n name ]
displayintr shows the distribution of device driver
interrupt handlers between the CPUs of an SMP system.
displayintr understands the following options:
For each CPU, displayintr shows the names
of the interrupt handler routines associated with each interrupt
vector number, and one or more of the following code letters to
indicate its capabilities:
Specify the initial processor to be used in the output.
The default is to use the base processor (CPU 1).
Specify an alternative name for the executable kernel.
The default name is /unix.
Fixed; the interrupt handler is always associated with this CPU.
Movable; the interrupt handler can be associated with a different
CPU at system startup.
Sharable; the interrupt handler can share the interrupt vector with
Upon successful completion, the program exits with status 0.
On error, the exit value is non-zero.
The following example shows that the interrupt handlers
ida0intr and ida0intr are movable from
CPU 2 and that they are sharing the same interrupt vector:
Vec no CPU number
0 clock (F) clock (F)
1 cnintr (F)
4 siointr (F)
6 flintr (F)
10 ida0intr (SM)
13 ci__intr (F) ci__intr (F)
displayintr is not part of any currently supported standard; it is
an extension of AT&T System V
provided by The Santa Cruz Operation, Inc.
© 2003 Caldera International, Inc. All rights reserved.
SCO OpenServer Release 5.0.7 -- 11 February 2003