make

Macro definitions

A macro definition is an identifier followed by an equal sign. The identifier must not be preceded by a colon or a tab. The name (string of letters and digits) to the left of the equal sign (trailing blanks and tabs are stripped) is assigned the string of characters following the equal sign (leading blanks and tabs are stripped). The following are valid macro definitions:

   2 = xyz
   abc = -ll -ly -lm
   LIBES =

The last definition assigns LIBES the null string. A macro that is never explicitly defined has the null string as its value. Remember, however, that some macros are explicitly defined in make's own rules.

make uses a simple macro mechanism for substitution in dependency lines and command strings. Macros can either be defined by command-line arguments or included in the makefile.

A macro is invoked by preceding the name with a dollar sign. Macro names longer than one character must be put in parentheses. The following are valid macro invocations:

   $(CFLAGS)
   $2
   $(xy)
   $Z
   $(Z)

The last two macros are equivalent.

Internally generated macros: $, $@, $?, and $<

$, $@, $?, and $< are four special macros that change values during the execution of the command. Before any command is issued, certain internally maintained macros are set. The $@ macro is set to the full name of the current target. The $@ macro is evaluated only for explicitly named dependencies. The $? macro is set to the string of names that were found to be younger than the target. The $? macro is evaluated along with explicit rules from the makefile. If the command was generated by an implicit rule, the $< macro is the name of the related file that caused the action, and the $ macro is the prefix, shared by the current and the dependent filenames.

The following fragment shows assignment and use of some macros:

   OBJECTS = x.o y.o z.o
   LIBES = -lm
   menu: $(OBJECTS)
           cc $(OBJECTS)  $(LIBES)  -o $@
     . . .

make LIBES="-ll -lm"

This command loads the three objects with both the lex (-ll) and the math (-lm) libraries, because macro definitions on the command line override definitions in the makefile. (In UNIX system commands, arguments with embedded blanks must be quoted.) For example, the following command can be used:

cd $(<D); $(MAKE) $(<F)

Extensions of $, $@, and $<

The following related macros are also available: $(@D), $(@F), $(D), $(F), $(<D), and $(<F). The D refers to the directory part of the single-character macro. The F refers to the filename part of the single-character macro. These additions are useful when building hierarchical makefiles. They allow access to directory names for purposes of using the UNIX cd(C) command.

Also see make(CP) for descriptions of the $% (library member) and $! (target name) macros.

Search path macro

If a macro named VPATH is assigned a list of colon-separated directory names, make will search these directories when looking for files with relative path names, in the same way the shells use the PATH environment variable.